In memory matrix multiplication and its usage in neural networks

Abstract

A device for in memory vector-matrix multiplication includes a memory array and in-memory logic. The memory array has at least two sections and stores a multiplier matrix. The memory array also receives and stores an input multiplicand arranged in a vector such that the operands of the vector-matrix multiplication are located on a same column of the memory array. Each of the sections is one of: a volatile memory array, a non-volatile memory array, a destructive memory array and a non-destructive memory array. The in-memory logic computes an output of the vector-matrix multiplication using the stored input vector and the stored multiplier matrix. The memory array is one of the following type of memory array: RAM, DRAM, SRAM, Re-RAM, ZRAM, MRAM and Memristor.

Dependencies are inferred from the claim text.