Corrupt packet detector for C-PHY receiver
AssigneeQUALCOMM Incorporated
InventorsYasser Ahmed, Sachin Ajit Devamare
Life of this patent
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AssigneeQUALCOMM Incorporated
InventorsYasser Ahmed, Sachin Ajit Devamare
Estimating the term…
A communication interface circuit has a deserializer configured to convert a serial stream of 3-bit symbols received from a three-wire serial bus to a parallel multi-symbol word comprising a plurality of symbols ordered in accordance with time of arrival at an input of the deserializer, detection circuits configured to determine whether a pattern of symbols in the parallel multi-symbol word indicates a corrupt data packet, and a finite state machine configured to activate one or more flags responsive to feedback received from the detection circuits. each flag can be configured to cause termination of reception of the corrupt data packet when the each flag is active.
A communication interface circuit, comprising:
A method for operating a communication interface circuit, comprising:
An apparatus, comprising:
A non-transitory processor-readable storage medium comprising code configured to cause a processing circuit to:
Dependencies are inferred from the claim text.