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AssigneeAmpere Computing LLC
InventorsRichard James Shannon, Stephan Jean Jourdan, Matthew Robert Erler, Jared Eric Bendt
Estimating the term…
Apparatuses, systems, and methods for configuring combined private and shared cache levels in a processor-based system. The processor-based system includes a processor that includes a plurality of processing cores each including execution circuits which are coupled to respective cache(s) and a configurable combined private and shared cache, and which may receive instructions and data on which to perform operations from the cache(s) and the combined private and shared cache. A shared cache portion of each configurable combined private and shared cache can be treated as an independently-assignable portion of the overall shared cache, which is effectively the shared cache portions of all of the processing cores. Each independently-assignable portion of the overall shared cache can be associated with a particular client running on the processor as an example. This approach can provide greater granularity of cache partitioning of a shared cache between particular clients running on a processor.
A processor-based system, comprising:
A processor-based system comprising a means for processing including means for storing information, the means for storing information configured to include a configurable shared cache portion in a first processing core, the shared cache portion of the first processing core configured to be associated with a first client application, and a configurable shared cache portion in a second processor core, the shared cache portion of the second processing core configured to be associated with the first client application.
A method of associating a shared cache portion of a cache, comprising:
A non-transitory computer-readable medium having stored thereon computer-executable instructions which, when executed by a processor, cause the processor to:
Dependencies are inferred from the claim text.