US 12,007,894 B2Granted

Battery management apparatus and method

AssigneeLG Energy Solution, Ltd.

InventorsJae-Yeon Choi, Jong-Shik Baek

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Abstract

A battery management apparatus according to an embodiment of the present disclosure includes a processor including a plurality of cores respectively provided with a cache memory and configured to set a core storing a record-target data in the cache memory thereof among the plurality of cores as a main core and set a core other than the main core among the plurality of cores as a sub core; and a main memory configured to store the record-target data by the main core, wherein the main core is configured to block an authority of the sub core to access the main memory while the record-target data is being recorded in the main memory, and endow an authority to access the main memory to the sub core after the record-target data is recorded in the main memory.

Claims17

Dependent claims

A battery management apparatus for preventing data inconsistency in a multi-core environment, comprising:

a processor including a plurality of cores, each respectively provided with a cache memory, the processor being configured to:
receive measurement data for at least one of current, voltage, and temperature of a battery cell;
set a core storing a record-target data in the cache memory thereof among the plurality of cores as a main core, the main core being configured to estimate at least one of a state of charge (SOC) and a state of health (SOH) of the battery cell based on the measurement data, and the record-target data including the at least one of the SOC and the SOH estimated by the main core;
and
set a core other than the main core among the plurality of cores as a sub core;
and
a main memory configured to store the record-target data from the main core,
wherein the main core is configured to:
transmit a first interrupt and the record-target data together to the sub core to block an authority of the sub core to access the main memory,
record the record-target data in the main memory after transmitting the first interrupt and the record-target data to the sub core, and
transmit a second interrupt to the sub core to endow an authority to access the main memory to the sub core after the record-target data is recorded in the main memory,
wherein the main core is configured to estimate one of the SOC and the SOH of the battery cell based on the measurement data,
wherein the record-target data is configured to include the one of the SOC and the SOH estimated by the main core, and
wherein the sub core is configured to estimate the other of the SOC and the SOH of the battery cell based on the measurement data.

11 more elements

A battery management method, comprising:

receiving measurement data for at least one of current, voltage, and temperature of a battery cell;
a main core setting operation of setting a core for recording a record-target data stored in a cache memory thereof in a main memory, among a plurality of cores of a processor, as a main core, the main core being configured to estimate at least one of a state of charge (SOC) and a state of health (SOH) of the battery cell based on the measurement data, and the record-target data including the at least one of the SOC and the SOH estimated by the main core;
an access authority blocking operation of blocking an authority of a sub core, which is other than the main core, among the plurality of cores, to access the main memory by transmitting a first interrupt and the record-target data together from the main core to the sub core;
recording the record-target data in the main memory after the first interrupt and record-target data are transmitted together from the main core to the sub core;
and
an access authority endowing operation of endowing an authority to access the main memory to the sub core by transmitting a second interrupt from the main core to the sub core, after the record-target data is recorded in the main memory,
wherein the main core is configured to estimate one of the SOC and the SOH of the battery cell based on the measurement data,
wherein the record-target data is configured to include the one of the SOC and the SOH estimated by the main core, and
wherein the sub core is configured to estimate the other of the SOC and the SOH of the battery cell based on the measurement data.

6 more elements

Dependencies are inferred from the claim text.

Facts

Application: 17/420,046Filed 17 Sep 2020
Priority: KR 10-2019-011625320 Sep 2019
Published: US 2022/0091982 A124 Mar 2022
Granted: 11 Jun 2024
Term ends: Not estimatedThe source records don’t support an estimate.

Classification13 codes

G06F 12/0815
Multiuser, multiprocessor or multiprocessing cache systems: cache consistency protocols
H02J 7/80
Circuit arrangements for charging or discharging batteries or for supplying loads from batteries: including monitoring or indicating arrangements
G06F 9/526
Program synchronisation; Mutual exclusion, e.g. by means of semaphores: mutual exclusion algorithms
G06F 12/0808
Multiuser, multiprocessor or multiprocessing cache systems: with cache invalidating means

Family

US 2022/0091982 A1Pre-grant publication · published 24 Mar 2022
US 12,007,894 B2This patent

From the US filing history. Foreign family members aren’t listed.

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