Chip having debug memory interface and debug method thereof

A debug method applied to a chip having a processing unit and an internal storage unit where the internal storage unit is used to store status data generated during operation of the processing unit, and the debug method comprising the following steps:

• providing a debug memory interface and a detection unit, the debug memory interface comprising a chip select pin to electrically connect an external memory device through the chip select pin,
• using the detection unit to detect a voltage level of the chip select pin to determine whether the debug memory interface is electrically connected to the external memory device;
• generating and outputting a control signal to the processing unit to trigger the processing unit to read a debug program from the external memory device when the detection unit detects that the chip select pin is electrically connected to the external memory device;
• and
• executing the debug program by using the processing unit to run a debug mode based on the status data.