Accessing data using error correction operation(s) to reduce latency at a memory sub-system

A system comprising:

• one or more memory devices;
• and
• a processing device coupled to the one or more memory devices, wherein the processing device is to perform operations comprising:
• receiving a request to access data programmed to memory cells of at least one of the one or more memory devices;
• determining one or more characteristics associated with the memory cells wherein the one or more characteristics comprise a difference between a first time period at which the data was programmed to the at least one of the one or more memory devices and a second time period at which the request to access the data was received;
• selecting, from a plurality of error correction operations, a first error correction operation to be performed to access the data in accordance with the request, wherein the first error correction operation is selected in view of the determined one or more characteristics;
• and
• performing the first error correction operation to access the data in accordance with the request.

A non-transitory computer-readable storage medium comprising instructions that, when executed by a processing device, cause the processing device to perform operations comprising:

• receiving a request to access data programmed to a memory sub-system, wherein the data was programmed to the memory sub-system at a first time period and the request is received at a second time period;
• determining whether memory cells of the memory sub-system that store the programmed data satisfy one or more cell degradation criteria at least by determining whether a distance between the first time period and the second time period exceeds a time distance threshold;
• and
• responsive to determining that the memory cells satisfy the one or more cell degradation criteria, performing an error correction operation to access the data in accordance with the received request.