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US 12,007,834 B2Granted
Semiconductor device
AssigneeSK hynix Inc.
InventorChoung Ki Song
Life of this patent
Estimating the term…
Abstract
A semiconductor device includes an error check execution signal generation circuit configured to generate an error check execution signal for performing an error check operation when an ECS (Error Check and Scrub) command that is generated based on a refresh command is input; and an ECS control circuit configured to generate an ECS active command and an ECS read command for performing the error check operation based on the ECS command and the error check execution signal, and successively generate the ECS read commands to perform the error check operation.
Claims20
A semiconductor device comprising:
- an error check execution signal generation circuit configured to generate an error check execution signal for performing an error check operation when an ECS (Error Check and Scrub) command that is generated based on a refresh command is input;
- and
- an ECS control circuit configured to:
- generate an ECS active command and an ECS read command for performing the error check operation based on the ECS command and the error check execution signal, and
- successively generate the ECS read commands to perform the error check operation.
2 more elements
A semiconductor device comprising:
- an ECS control circuit configured to:
- generate an ECS active command for performing an error check operation based on an ECS command and an error check execution signal, and
- then successively generate ECS read commands;
- and
- a select address generation circuit configured to:
- output, as a select row address and a select column address, during the error check operation, a row address and a column address that are sequentially counted whenever the ECS active command and the ECS read command are input, and
- store the counted row address and column address when an error flag signal is input.
4 more elements
Dependencies are inferred from the claim text.