Systems, devices, and methods for controller devices handling fault events

A controller chip, comprising:

• a first cluster comprising one or more first controller units configured to provide a first computational effort for an application, a first power supply grid configured to power the one or more first controller units, a first clock tree structure configured to supply one or more clock signals to the one or more first controller units, a first reset tree configured to reset one or more components of the first cluster, and a first power supply input configured to provide power to the first cluster;
• a second cluster comprising one or more second controller units configured to provide a second computational effort for the application, a second power supply grid configured to power the one or more second controller units, a second clock tree structure configured to supply one or more clock signals to the one or more second controller units, a second reset tree configured to reset one or more components of the second cluster, and a second power supply input configured to provide power to the second cluster;
• and
• a monitoring cluster different from the first cluster and the second cluster, and comprising a third clock tree structure and a monitoring circuit, wherein the first, second, and third clock tree structures are configured to operate independently of each other, and the monitoring circuit is configured to:
• monitor the first power supply input and the first clock tree structure of the first cluster, and the second power supply input and the second clock tree structure of the second cluster;
• and
• in response to determining a power supply failure and/or a clock signal supply failure in the first cluster, indicate the determined power supply failure and/or the determined clock signal supply failure to the second cluster to take one or more actions;
• wherein the second cluster is configured, in response to receiving an indication from the monitoring circuit of the power supply failure or the clock signal supply failure in the first cluster, to re-assign the first computational effort from the first cluster to the second cluster according to the indication.