Semiconductor device

A semiconductor device comprising:

• a stacked body including a plurality of electrode layers stacked with an insulator interposed, a source-side select gate layer provided below the electrode layers, and a drain-side select gate layer provided above the electrode layers;
• a semiconductor body extending in a stacking direction of the stacked body through the electrode layers and having a pipe shape, a plurality of memory cells being provided at intersecting portions of the semiconductor body with the electrode layers;
• and
• a columnar insulating member provided inside the pipe-shaped semiconductor body at the intersecting portions of the pipe-shaped semiconductor body with the electrode layers and at an intersecting portion of the pipe-shaped semiconductor body with the source-side select gate layer,
• the electrode layers including a first electrode layer disposed in a first level in the stacking direction and a second electrode layer disposed in a second level in the stacking direction, one of the first level and the second level being located farther from the source-side select gate layer than the other of the first level and the second level while the other of the first level and the second level being located farther from the drain-side select gate layer than the one of the first level and the second level,
• the insulator including a first insulator contiguous above the first electrode layer, a second insulator contiguous below the first electrode layer, a third insulator contiguous above the second electrode layer, and a fourth insulator contiguous below the second electrode layer, the first electrode layer being interposed between the first insulator and the second insulator, the second electrode layer being interposed between the third insulator and the fourth insulator,
• a thickness of the first electrode layer being larger than both of a thickness of the first insulator and a thickness of the second insulator,
• an outer periphery of the pipe-shaped semiconductor body having a first outer periphery facing to the first insulator, a second outer periphery facing to the second insulator, a first base surface facing to the first electrode layer, a third outer periphery facing to the third insulator, a fourth outer periphery facing to the fourth insulator, and a second base surface facing to the second electrode layer, the first base surface being disposed between the first outer periphery and the second outer periphery and being defined by a surface substantially aligned in the stacking direction with the first outer periphery and the second outer periphery, the second base surface being disposed between the third outer periphery and the fourth outer periphery and being defined by a surface substantially aligned in the stacking direction with the third outer periphery and the fourth outer periphery,
• a diameter of the columnar insulating member at the first level being larger than a diameter of the columnar insulating member at the second level,
• a distance between the first base surface and the first electrode layer being larger than a distance between the second base surface and the second electrode layer.