Analog memory-based complex multiply-accumulate (MACC) compute engine

A circuit comprising:

• a first pulse-width modulator configured to generate a first pulse based on a first input;
• a second pulse-width modulator configured to generate a second pulse based on a second input;
• a first differential circuit comprising a first transistor, a second transistor, a first resistor, and a second resistor;
• a second differential circuit comprising a first transistor, a second transistor, a first resistor, and a second resistor, wherein:
• a gate of the first transistor of the first differential circuit and a gate of the second transistor of the first differential circuit;
• and
• a gate of the first transistor of the second differential circuit and a gate of the second transistor of the second differential circuit are configured to be controlled by the first and second pulse width modulators based on the first input and the second input;
• wherein:
• the first resistor of the first differential circuit has a configurable resistance, a first terminal of the first resistor is coupled to a voltage supply node and a second terminal of the first resistor is coupled to a first terminal of the first transistor of the first differential circuit;
• the second resistor of the first differential circuit has a configurable resistance, a first terminal of the second resistor of the first differential circuit is coupled to the voltage via the voltage supply node and a second terminal of the second resistor of the first differential circuit is coupled to a first terminal of the second transistor of the first differential circuit;
• the first resistor of the second differential circuit has a configurable resistance, a first terminal of the first resistor of the second differential circuit is coupled to the voltage via the voltage supply node and a second terminal of the first resistor of the second differential circuit is coupled to a first terminal of the first transistor of the second differential circuit;
• and
• the second resistor of the second differential circuit has a configurable resistance, a first terminal of the second resistor of the second differential circuit is coupled to the voltage via the voltage supply node and a second terminal of the second resistor of the second differential circuit is coupled to a first terminal of the second transistor of the second differential circuit;
• further comprising an analog-to-digital converter having an input coupled to the voltage supply node.