Double gate transistor device and method of operating

A method of using a transistor device, the method comprising:

• with a first gate electrode of the transistor device, generating a first conducting channel in a semiconductor body in response to a first signal driving the first gate electrode at a first slew rate, wherein the semiconductor body has a first semiconductor layer comprising a first type of group III nitride and a second semiconductor layer adjoining the first semiconductor layer and comprising a second type of group III nitride;
• and
• with a second gate electrode of the transistor device, generating a second conducting channel in the semiconductor body in response to a second signal driving the second gate electrode at a second slew rate greater than the first slew rate, wherein the first gate electrode and the second gate electrode are spaced apart in a current flow direction of the transistor device,
• wherein the first gate electrode and the second gate electrode are electrically insulated with respect to each other, and wherein the first gate electrode and the second gate electrode are controlled individually with respect to each other in a mode of operation,
• wherein each of the first gate electrode and the second gate electrode extends through the second semiconductor layer into the first semiconductor layer and is dielectrically insulated from the second semiconductor layer and the first semiconductor layer by a gate dielectric,
• wherein, in a vertical cross-sectional view, a source electrode has a vertical edge immediately adjacent to a first vertical edge of the first semiconductor layer and immediately adjacent to a first vertical edge of the second semiconductor layer, and
• wherein, in a vertical cross-sectional view, a drain electrode is spaced apart from the source electrode and has a vertical edge immediately adjacent to a second vertical edge of the first semiconductor layer and immediately adjacent to a second vertical edge of the second semiconductor layer.

A method of forming a transistor device, the method comprising:

• forming a semiconductor body with a first semiconductor layer comprising a first type of group III nitride and a second semiconductor layer adjoining the first semiconductor layer and comprising a second type of group III nitride;
• forming a source electrode having a vertical edge immediately adjacent to a first vertical edge of the first semiconductor layer and immediately adjacent to a first vertical edge of the second semiconductor layer in a vertical cross-sectional view;
• forming a drain electrode spaced apart from the source electrode and having a vertical edge immediately adjacent to a second vertical edge of the first semiconductor layer and immediately adjacent to a second vertical edge of the second semiconductor layer in a vertical cross-sectional view;
• and
• forming a first gate electrode configured for generating a first conducting channel in the semiconductor body in response to a first signal driving the first gate electrode at a first slew rate and a second gate electrode configured for generating a second conducting channel in the semiconductor body in response to a second signal driving the second gate electrode at a second slew rate greater than the first slew rate, wherein the first gate electrode and the second gate electrode are spaced apart in a current flow direction of the transistor device,
• wherein the first gate electrode and the second gate electrode are electrically insulated with respect to each other, and wherein the first gate electrode and the second gate electrode are controlled individually with respect to each other in a mode of operation,
• wherein each of the first gate electrode and the second gate electrode extends through the second semiconductor layer into the first semiconductor layer and is dielectrically insulated from the second semiconductor layer and the first semiconductor layer by a gate dielectric.