Dual gate vertical thin film transistors and methods for forming the same

A vertical field effect transistor, comprising:

• a vertical stack comprising, from bottom to top, a bottom electrode, a dielectric pillar structure, and a top electrode;
• an active layer comprising a semiconducting material and laterally surrounding the top electrode and comprising a pair of vertically-extending wing portions that overlie sidewalls of the dielectric pillar structure and the bottom electrode;
• an outer gate dielectric overlying sidewalls of the active layer;
• outer gate electrodes laterally surrounding the outer gate dielectric;
• an inner gate electrode passing through the dielectric pillar structure;
• and
• an inner gate dielectric contacting sidewalls of the inner gate electrode.

A semiconductor structure comprising:

• vertical stacks located over a substrate, wherein each of the vertical stacks comprises, from bottom to top, a bottom electrode, a dielectric pillar structure, and a top electrode;
• active layers laterally surrounding a respective one of the vertical stacks;
• inner gate electrodes passing through a respective subset of the dielectric pillar structures in a respective row of vertical stacks that are arranged along a first horizontal direction;
• outer gate electrodes laterally surrounding a respective row of active layers,
• wherein each of the outer gate electrodes comprises a row of tubular gate electrode regions that laterally surround a respective one of the vertical stacks.