Vertical field effect transistor with crosslink fin arrangement

A method of forming a semiconductor structure, comprising:

• patterning a plurality of fin structures on an uppermost surface of a semiconductor substrate, each fin structure of the plurality of fin structures including n first regions extending perpendicular to the uppermost surface of the semiconductor substrate and n-1 second regions extending between and connecting each of the n first regions and parallel to the uppermost surface of the semiconductor substrate, wherein n≤1.

A method of forming a semiconductor structure comprising:

• forming a hardmask layer on an uppermost surface of a semiconductor substrate;
• and
• transferring a pattern to the hardmask layer to define a plurality of fin structures on the uppermost surface of the semiconductor substrate, the plurality of fins structures including one or more vertical regions extending in a direction perpendicular to the uppermost surface of the semiconductor substrate and parallel to one another, at least two vertical regions of the one or more vertical regions being connected by a horizontal region extending between the at least two vertical regions in a direction parallel to the uppermost surface of the semiconductor substrate.