Hybrid pocket post and tailored via dielectric for 3D-integrated electrical device

An electrical device comprising:

• a substrate;
• an insulating layer supported by the substrate, wherein the insulating layer has at a via hole;
• and
• an electrically conductive vertical interconnect disposed in the via hole;
• wherein the vertical interconnect has a coefficient of thermal expansion that is equal to or less than a coefficient of thermal expansion of the insulating layer;
• wherein the vertical interconnect includes a recessed cup in its upper surface;
• and wherein the recessed cup contains an electrically conductive contact having a coefficient of thermal expansion that is greater than the coefficient of thermal expansion of the vertical interconnect.

A 3D-integrated electrical device comprising

• a first electrical device bonded and electrically integrated to a second electrical device, each of the electrical devices including:
• a substrate;
• an insulating layer supported by the substrate, wherein the insulating layer has a via hole;
• and
• an electrically conductive vertical interconnect disposed in the via hole;
• wherein the vertical interconnect has a coefficient of thermal expansion that is equal to or less than a coefficient of thermal expansion of the insulating layer;
• the 3D-integrated electrical device comprising a hybrid vertical interconnect including:
• a post made with a first electrically conductive material of the electrically conductive vertical interconnects of the first electrical device and the second electrical device, and
• a contact disposed within a pocket of the post, the contact made with a second electrically conductive material,
• wherein the first electrically conductive material has a coefficient of thermal expansion that is less than a coefficient of thermal expansion of the second electrically conductive material.