Memory device and operating method of the same

A method, comprising:

• operating a first bit cell in a first operational type and operating a second bit cell in a second operational type different from the first operational type,
• wherein operating the first bit cell in the first operational type comprises:
• transmitting a first voltage and a second voltage to a first control line and a first word line respectively and
• transmitting a third voltage to a second word line to a first protection array coupled to a first memory cell of the first bit cell at a first node, wherein the first control line and the first word line are coupled to the first memory cell;
• wherein operating the second bit cell comprises:
• transmitting the first voltage and the third voltage to the second bit cell through the first control line and a third word line coupled to the second bit cell and transmitting a fourth voltage through a second protection array of the second bit cell to a second node, wherein the fourth voltage is greater than the second voltage.

A memory device, comprising:

• a first bit cell comprising a first memory cell coupled to a first word line and a second bit cell comprising a second memory cell coupled to a second word line, wherein the first and second memory cells are coupled to a first control line and further coupled to a first bit line through first and second nodes,
• wherein the first bit cell further comprises a first protection array that is coupled to the first memory cell at the first node and a third word line having a first voltage level in a programming mode of the first bit cell,
• wherein the second bit cell further comprises a second protection array that is coupled to the second memory cell at the second node and a fourth word line having a second voltage level different from the first voltage level in the programming mode of the first bit cell,
• wherein the second protection array is configured to couple the fourth word line to the second node in response to the second voltage level on the fourth word line and a first control signal in the first control line.