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US 12,002,527 B2Granted
Programmable resistance memory on wide-bandgap semiconductor technologies
AssigneeAttopsemi Technology Co., LTD
InventorShine C. Chung
Life of this patent
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Abstract
Programmable resistive memory can be integrated with wide-bandgap semiconductor devices on a wide-bandgap semiconductor, silicon, or insulator substrate. The wide-bandgap semiconductor can be group IV-IV, III-V, or II-VI crystal or compound semiconductor, such as silicon carbide or gallium nitride. The programmable resistive memory can be PCRAM, RRAM, MRAM, or OTP. The OTP element can be a metal, silicon, polysilicon, silicided polysilicon, or thermally insulated wide-bandgap semiconductor. The selector in a programmable resistive memory can be a MOS or diode fabricated by wide-bandgap semiconductor.
Claims19
A programmable resistive memory integrated with wide-bandgap semiconductor devices, comprising:
- a plurality of programmable resistive cells, at least one of the cells comprising:
- a programmable resistive element (PRE) having one end coupled to a first supply voltage line;
- a selector having an active region divided into at least a first active region and a second active region, where the first active region having a first type of dopant and a second active region having a first or a second type of dopant, the first active region providing a first terminal of the selector, the second active region providing a second terminal of the selector, both the first and second active regions built on a semiconductor material on a semiconductor or insulator substrate, the first active region coupled to the PRE and the second active region coupled to a second supply voltage line;
- and
- a gate fabricated on the layer of the semiconductor material with a sandwich of dielectric in between, the gate coupled to a third supply voltage line, the gate configured to divide the active region into the first active region and the second active region,
- wherein the PRE is configured to be programmable by applying voltages to the first, second, and/or the third supply voltage lines to thereby change its logic state,
- wherein the semiconductor material includes at least one of group IV-IV, III-V, or II-VI crystalline or compound semiconductor that has a bandgap significantly wider than silicon,
- wherein the programmable resistive element includes at least one of:
- (i) a phase-change film in PCRAM, (ii) a resistive thin film in RRAM, or (iii) a magnetic tunnel junction (MTJ) in MRAM.
6 more elements
A programmable resistive memory integrated with wide-bandgap semiconductor devices, comprising:
- a plurality of programmable resistive cells, at least one of the cells comprising:
- a programmable resistive element (PRE) having one end coupled to a first supply voltage line;
- a selector having at least a first active region and a second active region, where the first active region having a first type of dopant and a second active region having a first or a second type of dopant, the first active region providing a first terminal of the selector, the second active region providing a second terminal of the selector, both the first and second active regions built on a semiconductor material on a semiconductor or insulator substrate, the first active region coupled to the PRE and the second active region coupled to a second supply voltage line;
- and
- a gate fabricated on the layer of the semiconductor material with a sandwich of dielectric in between;
- the gate coupled to a third supply voltage line,
- wherein the PRE is configured to be programmable by applying voltages to the first, second, and/or the third supply voltage lines to thereby change its logic state,
- wherein the semiconductor material includes at least one of group IV-IV, III-V, or II-VI crystalline or compound semiconductor that has a bandgap significantly wider than silicon, and
- wherein programmable resistive element includes at least one of a one-time-programmable (OTP) element.
6 more elements
An electronics system, comprising:
- a circuit block fabricated by wide-bandgap semiconductor, and
- a programmable resistive memory operatively connected to the circuit block, the programmable resistive memory including a plurality of programmable resistive cells, at least one of the cells comprising:
- a programmable resistive element (PRE) having one end coupled to a first supply voltage line;
- a selector having at least a first active region and a second active region, where the first active region having a first type of dopant and a second active region having a first or a second type of dopant, the first active region providing a first terminal of the selector, the second active region providing a second terminal of the selector, both the first and second active regions built on a semiconductor material on a semiconductor or insulator substrate, the first active region coupled to the PRE and the second active region coupled to a second supply voltage line;
- and
- a gate fabricated on the layer of semiconductor material with a sandwich of dielectric in between, the gate is coupled to a third supply voltage line and serves to:
- (i) control the conductivity between the first and the second active region, or (ii) divide the first and second active regions during fabrication,
- wherein the PRE is configured to be programmable by applying voltages to the first, second, and/or the third supply voltage lines to thereby change its logic state, and
- wherein the programmable resistive element includes an OTP element that has at least one metal, polysilicon, silicided polysilicon, or thermally insulated wide-bandgap semiconductor.
6 more elements
A method for operating a programmable resistive memory on a semiconductor integrated with wide-bandgap semiconductor devices, the method comprises:
- providing a plurality of programmable resistive cells, at least one of the programmable resistive cells includes at least (i) a programmable resistive element having one end coupled to a first supply voltage line;
- and (ii) a selector having at least one first active region and a second active region, both the first and second active regions being fabricated on a semiconductor material on a semiconductor or insulator substrate, the first active region coupled to the programmable resistive element, and the second active region coupled to a second supply voltage line, (iii) a gate fabricated on the semiconductor material with a sandwich of dielectric in between, the gate coupled to a third supply voltage line, the gate provided to separate the first active region from the second active region;
- determining low and high program thresholds for the wide-bandgap semiconductor;
- and
- programming a logic state into at least one of the programmable resistive cells by applying voltages to the first, the second, and/or the third supply voltage lines,
- wherein the determining of the low and high thresholds comprises:
- programming a portion of the programmable resistive memory using initially a relatively low program voltage or current and verifying if all the programmable resistive cells in the portion of the programmable resistive memory are programmed;
- gradually increasing the program voltage or current until all the programmable resistive cells to be programmed in the portion of the programmable resistive memory are programmed and verified correctly, so as to determine the low program threshold for the wide-bandgap semiconductor;
- and
- incrementally increasing the program voltage or current and programming a portion of the programmable resistive memory until an excessive voltage or current is identified where at least one of the programmable resistive cells in the portion of the programmable resistive memory, either programmed or not, is verified with an error, so as to determine the high program threshold for the wide-bandgap semiconductor, and
- wherein the semiconductor material includes at least a wide-bandgap semiconductor.
8 more elements
Dependencies are inferred from the claim text.