Memory device error detection with improved scanning

A method, including:

• programing memory cells using multiple levels of charge distributions, wherein the memory cells are multi-level cells (MLCs), and each of the MLCs are capable of representing more than one bit of data using the multiple levels of charge distributions;
• assessing reliability for at least one page of MLCs without applying error correction code (ECC) by:
• recording a bit count number for a highest level of charge distribution within the at least one page of MLCs;
• and
• counting bits for the highest level of charge distributions within the at least one page of MLCs without counting bits for all of the multiple levels of charge distributions;
• comparing the counted bits to the recorded bit count number;
• and
• determining the at least one page of MLCs is not reliable only when the counted bits are not equal to the recorded bit count number and
• in response to determining that the at least one page of MLCs is not reliable, performing operations to recover programmed data.

A method, including:

• programing memory cells using multiple levels of charge distributions, wherein the memory cells are multi-level cells (MLCs), and each of the MLCs are capable of representing more than one bit of data using the multiple levels of charge distributions;
• assessing reliability for at least one page of MLCs without applying error correction code (ECC) by:
• recording a bit count number for a lowest level of charge distribution within the at least one page of MLCs;
• and
• counting bits for the lowest level of charge distributions within the at least one page of MLCs without counting bits for all of the multiple levels of charge distributions;
• comparing the counted bits to the recorded bit count number;
• and
• determining the at least one page of MLCs is not reliable only when the counted bits are not equal to the recorded bit count number;
• and
• in response to determining that the at least one page of MLCs is not reliable, performing operations to recover programmed data.

A memory device, comprising:

• memory cells configured to establish multiple levels of charge distributions, wherein the memory cells are multi-level cells (MLCs), and each of the MLCs are capable of representing more than one bit of data using the multiple levels of charge distributions;
• and
• a memory controller configured to perform operations on the memory cells, the operations including:
• program the MLCs;
• assess reliability for at least one page of MLCs without applying error correction code (ECC) by:
• recording a data set, the data set including a bit count number for at least one of a highest level of charge distributions or a lowest level of charge distributions within the at least one page of MLCs;
• and
• counting bits for the highest level of charge distributions or for the lowest level of charge distributions within the at least one page of MLCs without counting bits for all of the multiple levels of charge distributions;
• comparing the counted bits to the recorded bit count number;
• and
• determining the at least one page of MLCs is not reliable only when the counted bits and the recorded bit count number are not equal;
• and
• perform operations to recover programmed data in response to determining that the at least one page of MLCs is not reliable.

A system, comprising:

• a host controller configured to serially communicate with a memory device;
• and
• the memory device includes memory cells and a memory controller configured to perform operations on the memory cells, the memory cells being configured to establish multiple levels of charge distributions, wherein the memory cells are multi-level cells (MLCs) and each of the MLCs are capable of representing more than one bit of data using the multiple levels of charge distributions, the operations including:
• program the MLCs;
• assess reliability for at least one page of MLCs without applying error correction code (ECC) by:
• recording a data set, the data set including a bit count number for at least one of a highest level of charge distributions or a lowest level of charge distributions within the at least one page of MLCs;
• and
• using firmware to count bits for the highest level of charge distributions or for the lowest level of charge distributions within the at least one page of MLCs without counting bits for all of the multiple levels of charge distributions, to compare the counted bits to the recorded bit count number, and to determine the at least one page of MLCs is not reliable only when the counted bits and the recorded bit count number are not equal;
• and
• perform operations to recover programmed data in response to determining that the at least one page of MLCs is not reliable.