Semiconductor device

A semiconductor device comprising:

• a memory cell array including a plurality of memory blocks, each of the plurality of memory blocks including a plurality of cell strings selected by a select line;
• pass transistors configured to provide select signals to select lines, connected to a selected memory block, in response to a first block select signal;
• and
• ground transistors configured to supply a first voltage to select lines, connected to unselected memory blocks, in response to a second block select signal, wherein:
• the ground transistors include at least one common gate structure, at least one common active region, and individual active regions, and each of the at least one common gate structure and the at least one common active region is shared by two or more ground transistors, among the ground transistors;
• the at least one common gate structure includes three or more gate regions extending in different directions;
• and
• the at least one common active region and each of the individual active regions are adjacent to two gate regions, among the three or more gate regions.

A semiconductor device comprising:

• a memory cell array including a plurality of memory blocks, each of the plurality of memory blocks including a plurality of cell strings selected by a select line;
• pass transistors configured to provide select signals to select lines, connected to a selected memory block, in response to a first block select signal;
• and
• ground transistors configured to supply a first voltage to select lines, connected to unselected memory blocks, in response to a second block select signal, wherein:
• the pass transistors include gate structures, arranged in a first direction, and active regions arranged in the first direction;
• the ground transistors share a common gate structure and a common active region, and the common active region extends in a second direction, different from the first direction;
• and
• a width of the common active region in the first direction is smaller than a width of each of the active regions of the pass transistors in the second direction.