Data readout circuit of resistive random access memory and resistive random access memory circuit

A data readout circuit of a resistive random access memory (RRAM), comprising:

• an adaptive current sense amplifier (CSA) and a reference current generator,
• wherein the adaptive CSA is configured to electrically connect to the RRAM, and the adaptive CSA is electrically connected to the reference current generator;
• the reference current generator is configured to generate a basic reference current;
• the adaptive CSA is configured to obtain a reference current based on the basic reference current and a bit-line current of the RRAM;
• and
• the adaptive CSA is configured to compare a size of the reference current and that of the bit-line current so as to read out data stored in the RRAM;
• wherein the adaptive CSA comprises a data readout module and a reference current module;
• the data readout module is electrically connected to the reference current module, and the data readout module is configured to electrically connect to the RRAM, and the reference current module is electrically connected to the RRAM and the reference current generator respectively;
• the reference current module is configured to obtain the reference current based on the basic reference current and the bit-line current;
• and
• the data readout module is configured to compare the size of the reference current and that of the bit-line current, so as to read out the stored data.