Writing method and erasing method of fusion memory

An erasing method of a fusion memory, wherein the fusion memory comprises:

• a plurality of memory cells, each of the plurality of memory cells comprises a bulk substrate, a source and a drain on the bulk substrate, a channel region extending between the source and the drain, a first interface layer on the channel region, a ferroelectric layer on the first interface layer, a second interface layer on the ferroelectric layer, and a gate on the second interface layer, wherein the first interface layer is configured to control a growth of a ferroelectric material of the ferroelectric layer, and the second interface layer is configured to isolate the gate and the ferroelectric layer to avoid mutual diffusion and interface damage,
• the erasing method comprising:
• applying a third voltage between the gate of at least one memory cell and the bulk of at least one memory cell, wherein an absolute value of the third voltage is less than a reversal voltage at which the ferroelectric layer is polarization reversed, and
• each of the source and the drain is grounded or in a floating state, so as to enable the fusion memory to achieve a function of a dynamic random access memory, and
• the erasing method further comprising:
• applying a fourth voltage between the gate of at least one memory cell and the bulk substrate of at least one memory cell, wherein an absolute value of the fourth voltage is greater than a reversal voltage at which the ferroelectric layer is polarization reversed, and each of the source and the gate is in grounded or in the floating state, so as to enable the fusion memory to achieve a function of a flash memory,
• wherein the third voltage and the fourth voltage are both negative voltages.