Gate driver on array circuit and display panel
OwnerYou Paninventor
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Abstract
The present embodiment provides a GOA circuit and a display panel, in which the GOA circuit comprises a forward/backward scanning control module, an output module, a potential regulation module, a node control module, and a voltage stabilizer module. A first node and a third node are not conducted when a second node is at a second potential; the first node and the third node are conducted and have a second potential when the second node is at a third potential, wherein the second potential is opposite to the third potential. Thus, GOA circuit's leakage issue existing in the TP suspension stage can be improved.
Claims20
Agate driver on array (GOA) circuit, comprising a plurality of GOA units connected in cascade, wherein N is a positive integer and a Nth GOA unit, except for the first, the second, the second to last, and the last GOA units, comprises:
- a forward/backward scanning control module, receiving a forward scan signal and a backward scan signal, electrically connected to an output terminal of the (N−2)th GOA unit, an output terminal of the (N+2)th GOA unit, and a first node, and configured to regulate the potential at the first node to a first potential according to the potential at the output terminal of the (N−2)th GOA unit, the potential at the output terminal of the (N+2) the GOA unit, the forward scan signal, and the backward scan signal;
- an output module, comprising a ninth thin-film transistor, wherein the ninth thin-film transistor has a gate electrode electrically connected to a third node, a source electrode electrically receiving a Nth clock signal, and a drain electrode electrically connected to an output terminal;
- a potential regulation module, receiving a (N+2)th clock signal, a (N−2)th clock signal, the forward scan signal, the backward scan signal, a constant high voltage potential, and a constant low voltage potential, electrically connected to the first node and the output terminal, and configured to regulate the potential at the first node to a constant voltage potential based on the control of the (N+2)th clock signal, the (N−2)th clock signal, the forward scan signal, and the backward scan signal;
- a node control module, receiving the constant voltage potential and electrically connected to the first node and a second node;
- a voltage stabilizer module, receiving the signals from the first node, the third node, and the second node and configured to prevent the first node and the third node from conduction when the second node is at a second potential and to conduct the first node and the third node to become the second potential when the second node is at a third potential, wherein the second potential is opposite to the third potential.
A gate driver on array (GOA) circuit, comprising a plurality of GOA units connected in cascade, wherein N is a positive integer and a Nth GOA unit, except for the first, the second, the second to last, and the last GOA units, comprises:
- a ninth thin-film transistor, having a gate electrode electrically connected to a third node, a source electrode electrically receiving a Nth clock signal, and a drain electrode electrically connected to an output terminal;
- a seventh thin-film transistor, having a source electrode electrically connected to a first node, a gate electrode connected to the first node, and a drain electrode connected to the third node;
- an eleventh thin-film transistor, having a source electrode electrically connected to the third node, a gate electrode connected to a second node, and a drain electrode connected to the first node;
- when the GOA circuit enters a suspended period during display, the seventh thin-film transistor and the eleventh thin-film transistor are turned off, the potential at the first node decreases, and the third node remains at the original high potential.
A display panel, comprising a gate driver on array (GOA) circuit, wherein the GOA circuit comprises a plurality of GOA units connected in cascade, N is a positive integer and a Nth GOA unit, except for the first, the second, the second to last, and the last GOA units, comprises:
- a forward/backward scanning control module, receiving a forward scan signal and a backward scan signal, electrically connected to an output terminal of the (N−2)th GOA unit, an output terminal of the (N+2)th GOA unit, and a first node, and configured to regulate the potential at the first node to a first potential according to the potential at the output terminal of the (N−2)th GOA unit, the potential at the output terminal of the (N+2) the GOA unit, the forward scan signal, and the backward scan signal;
- an output module, comprising a ninth thin-film transistor, wherein the ninth thin-film transistor has a gate electrode electrically connected to a third node, a source electrode electrically receiving a Nth clock signal, and a drain electrode electrically connected to an output terminal;
- a potential regulation module, receiving a (N+2)th clock signal, a (N−2)th clock signal, the forward scan signal, the backward scan signal, a constant high voltage potential, and a constant low voltage potential, electrically connected to the first node and the output terminal, and configured to regulate the potential at the first node to a constant voltage potential based on the control of the (N+2)th clock signal, the (N−2)th clock signal, the forward scan signal, and the backward scan signal;
- a node control module, receiving the constant voltage potential and electrically connected to the first node and a second node;
- and
- a voltage stabilizer module, receiving the signals from the first node, the third node, and the second node and configured to prevent the first node and the third node from conduction when the second node is at a second potential and to conduct the first node and the third node to become the second potential when the second node is at a third potential, wherein the second potential is opposite to the third potential.
Dependencies are inferred from the claim text.