Variant model-based compilation for analog simulation

A system comprising:

• a memory system configured to store computer-executable instructions;
• and
• a computing system, in response to execution of the computer-executable instructions, is configured to:
• identify multiple analog design blocks in a circuit design describing an electronic device, wherein the analog design blocks include different sets of parameters;
• generate equivalent networks for the analog design blocks using the different sets of the parameters, which includes, for each of the analog design blocks, selectively collapsing nodes and branches in the analog design blocks based on values of the corresponding sets of the parameters;
• selectively compile a subset of the analog design blocks into multiple compiled variant models based, at least in part, on a comparison of the equivalent networks;
• and
• simulate, by an analog simulator, the analog design blocks in the circuit design using the compiled variant models.

An apparatus comprising at least one computer-readable memory device storing instructions configured to cause one or more processing devices in a computing system to perform operations comprising:

• identifying multiple analog design blocks in a circuit design describing an electronic device, wherein the analog design blocks include different sets of parameters;
• generating equivalent networks for the analog design blocks using the different sets of the parameters, which includes, for each of the analog design blocks, selectively collapsing nodes and branches in the analog design blocks based on values of the corresponding sets of the parameters;
• selectively compiling a subset of the analog design blocks into multiple compiled variant models based, at least in part, on a comparison of the equivalent networks;
• and
• simulating, by an analog simulator, the analog design blocks in the circuit design using the compiled variant models.