Memory device operations for unaligned write operations
AssigneeMicron Technology, Inc.
InventorScheheresade Virani
Life of this patent
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AssigneeMicron Technology, Inc.
InventorScheheresade Virani
Estimating the term…
Implementations described herein relate to memory device operations for unaligned write operations. In some implementations, a memory device may receive, from a host device, a write command indicating data having a first size that corresponds to a first write unit and a first logical address. The memory device may allocate a set of buffers for the write command. The memory device may determine a set of physical addresses corresponding to a physical address that is associated with the second size, where the set of physical addresses are each associated with the first size. The memory device may merge stored data from the set of physical addresses to one or more buffers, from the set of buffers, that do not include the data to generate a data unit having the second size. The memory device may write the data unit to memory indicated by the set of physical addresses.
A memory device, comprising:
A method, comprising:
A system, comprising:
A system, comprising:
Dependencies are inferred from the claim text.