Physical unclonable function device and method

A method comprising:

• manufacturing an integrated circuit comprising a physical unclonable function device, the physical unclonable function device including:
• a first assembly of non-volatile memory cells each having a selection transistor embedded in a semiconductor substrate and a depletion-type state transistor having a control gate and a floating gate that are electrically connected, the depletion-type state transistors having respective effective threshold voltages belonging to a common random distribution, the first assembly of non-volatile memory cells being organized into two first matrix sub-assemblies disposed symmetrically with respect to a reading circuit, all rows of the two first matrix sub-assemblies being parallel;
• and
• a processing circuit comprising:
• the reading circuit, configured to carry out a reading including differential readings of the effective threshold voltages of the depletion-type state transistors of pairs of symmetric memory cells located respectively in the two first matrix sub-assemblies on homologous columns of the two first matrix sub-assemblies;
• and
• a second assembly of non-volatile memory cells each having a selection transistor embedded in the semiconductor substrate and a depletion-type state transistor having a control gate and a floating gate, the memory cells of the second assembly configured to contain reliability information representative of a reliability or unreliability of contents of the pairs of symmetric memory cells of the first assembly;
• the processing circuit configured to deliver, to an output interface of the physical unclonable function device, a group of output data based on the reading of the effective threshold voltages of the depletion-type state transistors of the memory cells of the first assembly;
• and
• generating and storing the reliability information during a test phase of the integrated circuit.

A method of operating a physical unclonable function device comprising a first assembly of non-volatile memory cells each having a selection transistor embedded in a semiconductor substrate and a depletion-type state transistor having a control gate and a floating gate that are electrically connected, the depletion-type state transistors having respective effective threshold voltages belonging to a common random distribution, the first assembly of non-volatile memory cells being organized into two first matrix sub-assemblies disposed symmetrically with respect to a reading circuit, all rows of the two first matrix sub-assemblies being parallel the physical unclonable function device also comprising a second assembly of non-volatile memory cells each having a selection transistor embedded in the semiconductor substrate and a depletion-type state transistor having a control gate and a floating gate, the memory cells of the second assembly configured to contain reliability information representative of a reliability or unreliability of contents of pairs of symmetric memory cells of the first assembly, the method comprising:

• with a reading circuit, performing differential readings of the effective threshold voltages of the depletion-type state transistors of pairs of symmetric memory cells;
• and
• with a processing circuit delivering, to an output interface of the physical unclonable function device, a group of output data based on the differential readings.