Device, method and system to supplement a skewed cache with a victim cache

A processor comprising:

• a skewed cache;
• a victim cache;
• first circuitry coupled to the skewed cache and the victim cache, the first circuitry to move a first line from the skewed cache to the victim cache based on either one of:
• a request to cache a second line;
• or
• a miss of a search of the skewed cache and the victim cache;
• and
• second circuitry coupled to the skewed cache and the victim cache, the second circuitry to swap the second line with a third line between the skewed cache and the victim cache based on a request to access the second line.

A system comprising:

• an integrated circuit (IC) chip comprising:
• first circuitry to:
• receive a first message which indicates a first address which corresponds to a first line of data;
• and
• identify a first location of a skewed cache based on the message;
• second circuitry coupled to the first circuitry, wherein, based on the first message, the second circuitry is to:
• move a second line from the first location to a second location of a second cache;
• and
• store the first line to the first location;
• wherein the first circuitry is further to receive a second message which indicates a second address which corresponds to the second line;
• and
• wherein the second circuitry is further to move the second line from the second location to the skewed cache based on the second message;
• and
• a display device coupled to the IC chip, the display device to display an image based on a signal communicated with the IC chip.