Vector fetch bus error handling
AssigneeMicrochip Technology Incorporated
InventorsMichael Catherwood, David Mickey
Life of this patent
Estimating the term…
Abstract
A computer system includes a non-transitory computer-readable memory to store (a) a vector table including an exception vector pointing to an exception handler and (b) a vector fail address of a vector fetch bus error handler, and a processor to identify an exception, initiate an exception vector fetch in response to the identified exception to read the exception vector from the vector table, identify a vector fetch bus error associated with the exception vector fetch, access the vector fail address of the vector fetch bus error handler in response to the vector fetch bus error, and execute the vector fetch bus error handler.
Claims17
A computer system including:
- non-transitory computer-readable memory to store:
- a vector table including an exception vector pointing to an exception handler;
- and
- a vector fail address of a vector fetch bus error handler;
- and
- a processor to:
- identify an exception;
- in response to the identified exception, initiate an exception vector fetch to read the exception vector from the vector table;
- identify a vector fetch bus error associated with the exception vector fetch;
- in response to the vector fetch bus error;
- set a vector fail status flag in a status register;
- access the vector fail address of the vector fetch bus error handler;
- and
- identify the vector fail status flag set in the status register, and in response, execute the vector fetch bus error handler to perform a vector fetch bus error recovery operation.
A method, comprising:
- identifying, by a processor, an exception;
- in response to the identified exception, initiating, by the processor, an exception vector fetch to read an exception vector from a vector table stored in non-transitory computer-readable memory;
- identifying, by the processor, a vector fetch bus error associated with the exception vector fetch;
- and
- in response to the vector fetch bus error:
- setting, by the processor, a vector fail status flag in a status register;
- accessing, by the processor, a vector fail address stored in non-transitory computer-readable memory, the vector fail address pointing to a vector fetch bus error handler;
- and
- identifying, by the processor, the vector fail status flag set in the status register, and in response, executing, by the processor, the vector fetch bus error handler to perform a vector fetch bus error recovery operation.
A method, comprising:
- storing a reset address in a user-configurable special function register;
- wherein the reset address in the user-configurable special function register is replaceable with a user-specified vector fail address in response to a user input;
- identifying, by a processor, an exception;
- in response to the identified exception, initiating, by the processor, an exception vector fetch to read an exception vector from a vector table stored in non-transitory computer-readable memory;
- identifying, by the processor, a vector fetch bus error associated with the exception vector fetch;
- and
- in response to the identified vector fetch bus error:
- accessing, by the processor, user-configurable special function register;
- if the accessed special function register stores the user-specified vector fail address pointing to the vector fetch bus error handler, accessing and executing the vector fetch bus error handler;
- and
- if the accessed special function register stores the reset address, accessing the reset address and resetting the processor.
Dependencies are inferred from the claim text.