Providing drive signals for a differential drive modulator

An apparatus comprising:

• a driver for providing drive signals for controlling a modulator comprising a first electrical input port for receiving a first drive signal and second and third electrical input ports for receiving a second drive signal that has a negative amplitude relative to the first drive signal, the driver comprising
• first driver circuitry configured to provide a first electrical signal;
• second driver circuitry configured to provide a second electrical signal, and third driver circuitry configured to provide a third electrical signal, where
• the second electrical signal has a voltage magnitude approximately equal to the voltage magnitude of the first electrical signal and a current approximately half of the current of the first electrical signal,
• the third electrical signal has a voltage magnitude approximately equal to the voltage magnitude of the first electrical signal and a current approximately half of the current of the first electrical signal,
• the second electrical signal has a negative voltage amplitude relative to the first electrical signal, and
• the third electrical signal has a negative voltage amplitude relative to the first electrical signal;
• a first output port directly connected to at least one output of a first transistor in the first driver circuitry and configured to provide the first electrical signal to the first electrical input port;
• a second output port directly connected to at least one output of a second transistor in the second driver circuitry and configured to provide the second electrical signal to the second electrical input port;
• and
• a third output port directly connected to at least one output of a third transistor in the third driver circuitry and configured to provide the third electrical signal to the third electrical input port;
• where the first driver circuitry, the second driver circuitry, and the third driver circuitry share a common node that is directly connected to a base port of the first transistor, a base port of the second transistor, and a base port of the third transistor.