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US 11,984,901 B2Granted
Compensation circuit and method for frequency divider circuit
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsMao-Hsuan Chou, Chih-Hsien Chang, Ruey-Bin Sheen
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Abstract
A counter signal counting at a frequency of a clock signal is generated. Among a plurality of different numeric ranges corresponding to a plurality of different thresholds, a threshold corresponding to a numeric range containing a frequency ratio is selected. In response to the counter signal reaching the selected threshold, a logic level of an output signal is switched.
Claims20
A method, comprising:
- generating a counter signal counting at a frequency of a clock signal;
- selecting, among a plurality of different numeric ranges corresponding to a plurality of different thresholds, a threshold corresponding to a numeric range containing a frequency ratio;
- and
- in response to the counter signal reaching the selected threshold, switching a logic level of an output signal.
1 more element
A compensation circuit for a frequency divider circuit, the compensation circuit comprising:
- a plurality of comparator circuits each coupled to receive a different set of bits of a counter signal corresponding to a frequency of a clock signal and a frequency ratio;
- a comparator selector circuit coupled to outputs of the plurality of comparator circuits, and configured to select, from the plurality of comparator circuits, a comparator circuit corresponding to the frequency ratio;
- and
- a retime circuit coupled to an output of the comparator selector circuit, and configured to
- receive the clock signal, and
- generate an output signal responsive to the frequency of the clock signal and a comparator output signal of the selected comparator circuit.
3 more elements
A method, comprising:
- counting r pulses of a clock signal, where r is a frequency ratio;
- upon a start of said counting, setting an output signal to a first logic level;
- and
- in response to said counting reaching a threshold,
- switching the output signal to a second logic level different from the first logic level, and
- maintaining the output signal at the second logic level until said counting ends,
- wherein said threshold is variable in accordance with the frequency ratio.
4 more elements
Dependencies are inferred from the claim text.