Voltage converter, storage device including voltage converter, and operating method of voltage converter
AssigneeSamsung Electronics Co., Ltd.
InventorsJaekyu Kim, Jeonghyeon Kim, Jehyung Yoon
Life of this patent
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Abstract
An operating method of a voltage converter, includes converting an input voltage to an output voltage and providing a load current corresponding to the output voltage in a pulse frequency modulation mode or a pulse width modulation mode, entering the pulse frequency modulation mode in response to an amount of the load current being less than or equal to a first threshold value, and entering the pulse width modulation mode in response to the amount of the load current being greater than a second threshold value.
Claims20
An operating method of a voltage converter, the method comprising:
- converting an input voltage to an output voltage and providing a load current corresponding to the output voltage in one of a pulse frequency modulation mode and a pulse width modulation mode;
- entering the pulse frequency modulation mode in response to an amount of the load current being less than or equal to a first threshold value;
- and
- entering the pulse width modulation mode in response to the amount of the load current being greater than a second threshold value,
- wherein, in the pulse frequency modulation mode, the load current is provided based on a first time delay, the first time delay being based on a first comparison of the input voltage and the output voltage with a switching frequency, and
- wherein, in the pulse width modulation mode, the load current is provided based on a second time delay, the second time delay being based on a second comparison of the input voltage and the output voltage with the switching frequency.
A voltage converter comprising:
- a first transistor connected between an input node and a switch node;
- a second transistor connected between the switch node and a ground node;
- an inductor connected between the switch node and an output node;
- a capacitor connected between the output node and the ground node;
- resistors connected with the output node, and configured to divide an output voltage of the output node to generate a feedback voltage;
- a comparator configured to compare the feedback voltage and a reference voltage to output a comparison signal;
- a mode control circuit configured to output a mode signal of a first level based on an amount of a load current supplied through the output node being less than or equal to a threshold and to output the mode signal of a second level based on the amount of the load current being greater than the threshold;
- a control logic circuit configured to generate a first control signal and a second control signal based on pulse frequency modulation based on the mode signal being at the first level and to generate the first control signal and the second control signal based on pulse width modulation based on the mode signal being at the second level;
- and
- a gate driver configured to control the first transistor and the second transistor in response to the first control signal and the second control signal.
A storage device comprising:
- a nonvolatile memory device;
- a controller configured to control the nonvolatile memory device;
- and
- a power management integrated circuit configured to supply an output voltage to the nonvolatile memory device and the controller,
- wherein the power management integrated circuit includes:
- a first transistor connected between an input node and a switch node;
- a second transistor connected between the switch node and a ground node;
- an inductor connected between the switch node and an output node from which the output voltage is output;
- a capacitor connected between the output node and the ground node;
- resistors connected with the output node, and configured to divide the output voltage to generate a feedback voltage;
- a mode control circuit configured to output a mode signal of a first level based on an amount of a load current being supplied through the output node is greater than a threshold and to output the mode signal of a second level based on the amount of the load current being less than or equal to the threshold;
- a control logic circuit configured to generate a first control signal and a second control signal based on pulse frequency modulation based on the mode signal being at the first level and to generate the first control signal and the second control signal based on pulse width modulation based on the mode signal being at the second level;
- and
- a gate driver configured to control the first transistor and the second transistor in response to the first control signal and the second control signal.
Dependencies are inferred from the claim text.