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US 11,909,312 B2Granted
Regulated voltage systems and methods using intrinsically varied process characteristics
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorChia Liang Tai
Life of this patent
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Abstract
A regulator system includes a multi-bit detector system and a multi-cell charge/discharge circuit. The multi-bit detector system includes a plurality of detectors. Each of the plurality of detectors has a predetermined threshold voltage. The multi-cell charge/discharge circuit includes a plurality of charge pumps. Each of the charge pumps is configured to generate a predetermined charge. Each of the charge pumps is associated with a predetermined threshold voltage of the detector circuit.
Claims20
A detector circuit, comprising:
- a comparator configured to generate an output based on a comparison of a reference voltage to a trigger voltage;
- and
- a compensation circuit comprising at least one compensation transistor configured to compensate for at least one process variation of the comparator,
- wherein the comparator comprises:
- a positive reference system including a PMOS current source and a PMOS pass-gate;
- a negative reference system including an NMOS current source and an NMOS pass-gate;
- and
- a transistor coupled between a pump output voltage input and at least one of the PMOS pass-gate and the NMOS pass-gate.
5 more elements
A regulator system, comprising:
- a plurality of detectors each comprising:
- a current comparator configured to generate an output by comparing a reference voltage to a trigger voltage, wherein the trigger voltage is determined by one or more process variations of the current comparator;
- and
- a compensation circuit comprising at least one compensation transistor configured to compensate for at least one process variations of the current comparator;
- and
- a plurality of charge pumps each associated with at least one of the plurality of detectors, wherein each of the charge pumps is configured to generate a predetermined charge,
- wherein the current comparator comprises:
- a positive reference system including a PMOS current source and a PMOS pass-gate;
- a negative reference system including an NMOS current source and an NMOS pass-gate;
- and
- a transistor coupled between a pump output voltage input and at least one of the PMOS pass-gate and the NMOS pass-gate.
8 more elements
A detector circuit, comprising:
- a comparator configured to generate an output based on a comparison of a reference voltage to a trigger voltage;
- a compensation circuit comprising at least one compensation transistor configured to compensate for at least one process variation of the comparator;
- and
- a plurality of charge pumps each configured to generate a pre-charge voltage and a boost voltage, wherein each of the plurality of charge pumps is configured to output the pre-charge voltage in response to a first signal and the boost voltage in response to a second signal,
- wherein the comparator comprises:
- a positive reference system including a PMOS current source and a PMOS pass-gate;
- a negative reference system including an NMOS current source and an NMOS pass-gate;
- and
- a transistor coupled between a pump output voltage input and at least one of the PMOS pass-gate and the NMOS pass-gate.
6 more elements
Dependencies are inferred from the claim text.