Semiconductor device

A semiconductor device comprising:

• a CPU;
• and
• an accelerator,
• wherein the accelerator comprises a first memory circuit and an arithmetic circuit,
• wherein the first memory circuit comprises a first transistor,
• wherein the first transistor comprises a semiconductor layer comprising a metal oxide in a channel formation region,
• wherein the arithmetic circuit comprises a second transistor,
• wherein the second transistor comprises a semiconductor layer comprising silicon in a channel formation region,
• wherein the CPU comprises a CPU core comprising a flip-flop with a backup circuit,
• wherein the backup circuit comprises a third transistor,
• wherein the third transistor comprises a semiconductor layer comprising a metal oxide in a channel formation region, and
• wherein the first transistor is stacked over the second transistor.

A semiconductor device comprising:

• a CPU;
• and
• an accelerator,
• wherein the accelerator comprises a first memory circuit, a driver circuit, and an arithmetic circuit,
• wherein the first memory circuit comprises a first transistor,
• wherein the first transistor comprises a semiconductor layer comprising a metal oxide in a channel formation region,
• wherein the driver circuit comprises a writing circuit and a reading circuit,
• wherein the writing circuit is configured to switch data to be written to the first memory circuit to a binary or ternary voltage value in accordance with a switching signal, a writing control signal, and a data signal and outputting the voltage value,
• wherein the reading circuit is configured to switch the voltage value to binary or ternary data corresponding to the voltage level retained in the first memory circuit in accordance with a first reference voltage and a second reference voltage and reading out the data,
• wherein the arithmetic circuit comprises a second transistor,
• wherein the second transistor comprises a semiconductor layer comprising silicon in a channel formation region,
• wherein the CPU comprises a CPU core comprising a flip-flop with a backup circuit,
• wherein the backup circuit comprises a third transistor,
• wherein the third transistor comprises a semiconductor layer comprising a metal oxide in a channel formation region, and
• wherein the first transistor is stacked over the second transistor.