US 11,908,834 B2 · Multi-chip package with reinforced isolation

Abstract

A multi-chip isolation (ISO) device package includes a leadframe including leads, an interposer substrate including a top copper layer and a bottom metal layer, with a dielectric layer in-between. A first IC die and a second IC die include circuitry including a transmitter or a receiver, and first and second bond pads are both attached top side up in the package. A laminate transformer is attached to the top copper layer positioned lateral to the IC die. Bondwires wirebond the first bond pads to first pads on the laminate transformer and to a first group of the leads or the lead terminals, and bondwires wirebond the second bond pads to second pads on the laminate transformer and to a second group of the leads or the lead terminals. A mold compound provides encapsulation.

Claims20

Dependent claims

A multi-chip isolation (ISO) device package, comprising:

an interposer substrate comprising a top copper layer and a bottom metal layer, with a dielectric layer positioned between the top copper layer and the bottom metal layer;
a laminate transformer attached to the top copper layer positioned lateral to a first IC die and a second IC die;
bondwires wirebonding respective ones of first bond pads of the first IC die to first pads on the laminate transformer and to a first group of leads or lead terminals;
bondwires wirebonding respective ones of second bond pads of a second IC die to second pads on the laminate transformer and to a second group of leads or lead terminals;
and
a mold compound providing encapsulation for the ISO device package, wherein the bottom metal layer is exposed from the ISO device package at least under the laminate transformer.

3 more elements

Dependencies are inferred from the claim text.

Multi-chip package with reinforced isolation

Life of this patent

Multi-chip package with reinforced isolation

Life of this patent

Abstract

Claims20