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US 11,908,819 B2Granted
Semiconductor packaging substrate fine pitch metal bump and reinforcement structures
AssigneeApple Inc.
InventorsJun Chung Hsu, Chih-Ming Chung, Jun Zhai, Yifan Kao, Young Doo Jeon, Taegui Kim
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Abstract
Semiconductor packaging substrates and processing sequences are described. In an embodiment, a packaging substrate includes a build-up structure, and a patterned metal contact layer partially embedded within the build-up structure and protruding from the build-up structure. The patterned metal contact layer may include an array of surface mount (SMT) metal bumps in a chip mount area, a metal dam structure or combination thereof.
Claims20
A semiconductor package comprising:
- a packaging substrate including:
- a plurality of metal routing layers;
- a plurality of dielectric layers including a top dielectric layer forming a topmost surface;
- a patterned metal contact layer, wherein the patterned metal contact layer includes:
- an array of surface mount (SMT) metal bumps in a chip mount area, the array of SMT metal bumps partially embedded within the top dielectric layer and protruding from the topmost surface of the top dielectric layer;
- and
- a metal dam structure laterally surrounding the array of SMT metal bumps in the chip mount area, the metal dam structure partially embedded within the top dielectric layer and protruding from the topmost surface of the top dielectric layer;
- and
- a device bonded to the array of SMT metal bumps;
- wherein the metal dam structure forms a first geometric shape adjacent a first edge and a second edge of the device, and a second geometric shape adjacent a corner of the device where the first edge intersects with the second edge.
7 more elements
Dependencies are inferred from the claim text.