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US 11,908,810 B2Granted
Hybrid semiconductor device and electronic device
AssigneeSamsung Electronics Co., Ltd.
InventorsHeungkyu Kwon, Junso Pak, Heeseok Lee
Life of this patent
Estimating the term…
Abstract
A hybrid semiconductor device includes an interposer substrate, a semiconductor package mounted on the interposer substrate, a molding member on the package substrate covering at least a portion of the semiconductor chip and exposing an upper surface of the semiconductor chip, and a stiffener disposed on an upper surface of the interposer substrate substantially around the semiconductor package.
Claims20
A hybrid semiconductor device, comprising:
- an interposer substrate;
- a semiconductor package mounted on an upper surface of the interposer substrate, the semiconductor package including a package substrate, a semiconductor chip mounted on the package substrate, and a molding member on the package substrate covering a side surface of the semiconductor chip and exposing an upper surface of the semiconductor chip;
- and
- a stiffener disposed on the upper surface of the interposer substrate, wherein the stiffener is a walled structure that surrounds the semiconductor package, an inner surface of the walled structure faces towards and is spaced from an outer surface of the molding member, and an empty space exists from the inner surface of the walled structure and the outer surface of the molding member;
- and
- a heat sink having a flat lower surface in contact with the upper surface of the semiconductor package, the flat lower surface of the heat sink extending over and spaced above the wall structure of the stiffener.
3 more elements
A hybrid semiconductor device, comprising:
- an interposer substrate;
- a semiconductor package disposed on an upper surface of the interposer substrate, the semiconductor package including a package substrate, a semiconductor chip mounted on the package substrate, and a molding member on the package substrate covering at least a portion of the semiconductor chip;
- a stiffener disposed on the upper surface of the interposer substrate, wherein the stiffener is a walled structure that surrounds the semiconductor package, an inner surface of the walled structure faces towards and is spaced from an outer surface of the molding member, and an empty space exists from the inner surface of the walled structure to the outer surface of the molding member;
- a heat sink having a flat lower surface in contact with the upper surface of the semiconductor package, the flat lower surface of the heat sink extending over and spaced above the wall structure of the stiffener;
- package connection terminals disposed between a lower surface of the semiconductor package and the upper surface of the interposer substrate;
- and
- interposer connection terminals disposed on a lower surface of the interposer substrate,
- wherein a pitch between the package connection terminals is less than a pitch between the interposer connection terminals.
5 more elements
An electronic device, comprising:
- a main board;
- an interposer substrate disposed on the main board;
- a semiconductor package mounted on an upper surface of the interposer substrate, the semiconductor package including a package substrate, a semiconductor chip mounted on the package substrate, and a molding member on the package substrate covering at least a portion of the semiconductor chip;
- a stiffener disposed on the upper surface of the interposer substrate, wherein the stiffener is a walled structure that surrounds the semiconductor package, an inner surface of the walled structure faces towards and is spaced from an outer surface of the molding member, and an empty space exists from the inner surface of the walled structure to the outer surface of the molding member;
- package connection terminals interposed between a lower surface of the semiconductor package and the upper surface of the interposer substrate;
- interposer connection terminals interposed between a lower surface of the interposer substrate and an upper surface of the main board;
- and
- a heat sink having a flat lower surface in contact with the upper surface of the semiconductor package, the lower surface of the heat sink extending over and spaced above the wall structure of the stiffener.
5 more elements
Dependencies are inferred from the claim text.