Method of metal gate formation and structures formed by the same

A method of forming a semiconductor structure, comprising:

• forming a first pair of source/drain regions and a second pair of source/drain regions in a substrate;
• depositing an interlayer dielectric layer over the substrate, the interlayer dielectric layer having a first trench between the first pair of source/drain regions and a second trench between the second pair of source/drain regions;
• forming a layer stack over the interlayer dielectric layer in the first trench and the second trench, wherein the layer stack has a first number of layers in the first trench and a second number of layers, different from the first number of layers, in the second trench;
• and
• depositing a conductive layer in the first trench and the second trench over the layer stack.

A method of forming a semiconductor structure, comprising:

• forming a first dummy gate electrode and a second dummy gate electrode over a substrate;
• forming first spacers on the first dummy gate electrode and second spacers on the second dummy gate electrode;
• depositing an interlayer dielectric layer over the first and second dummy gate electrodes and the substrate;
• etching the first and second dummy gate electrodes to form a first trench between the first spacers and a second trench between the second spacers;
• depositing a layer stack in the first trench and the second trench;
• depositing a work function layer over the layer stack;
• etching at least a portion of the work function layer from the first trench while keeping the work function layer and the layer stack intact in the second trench;
• and
• depositing a conductive layer to fill the first trench and the second trench.