Semiconductor device having merged epitaxial features with arc-like bottom surface and method of making the same

A semiconductor device, comprising:

• a substrate;
• first and second fins over the substrate and extending upwardly in a first direction;
• an epitaxial material comprising a first portion, a second portion, and a third portion, wherein the first portion is located on the first fin, the second portion is located on the second fin, and the third portion is connected to the first and second portions, wherein each of the first and second portions has a top surface bending downward towards the semiconductor substrate in a cross-sectional plane perpendicular to a lengthwise direction of the first and second fins, wherein the third portion has a bottom surface bended upwardly with an apex located between the first and second fins, and wherein in the cross-sectional plane the bottom surface has a first straight line and a second straight line intersecting at the apex;
• and
• a conductive feature in contact with the epitaxial material.

A semiconductor device, comprising:

• a substrate;
• a semiconductor fin protruding from the substrate and extending upwardly in a first direction;
• a source/drain (S/D) feature including a first portion over the semiconductor fin and a second portion over the first portion, wherein a top surface of the first portion of the S/D feature bends downward towards the substrate in a cross-sectional plane perpendicular to a lengthwise direction of the semiconductor fin, wherein the S/D feature comprises a first slanted sidewall and a second slanted sidewall, and wherein the first and second slanted sidewalls intersect;
• and
• a conductive feature disposed on the S/D feature, wherein a portion of the conductive feature is landed on the first slanted sidewall and a bottom of the conductive feature is closer to the substrate than an intersected portion of the first and second slanted sidewalls, the conductive feature comprises a sidewall extending in the first direction, and a bottom of the sidewall is lower than a topmost portion of the S/D feature and spaced apart from the bottom of the conductive feature.