Vertical semiconductor device and method for fabricating the same
AssigneeSK hynix Inc.
InventorJong-Hoon Kim
Life of this patent
Estimating the term…
Abstract
A method for fabricating a semiconductor device includes preparing a substrate including a first region and a second region, forming a lower alternating stack on the substrate; etching the lower alternating stack to form a lower opening in the second region, forming an upper alternating stack on the lower opening and the lower alternating stack to form recess portion caused by filling the lower opening in the second region, forming a mask layer on the upper alternating stack using the recess portion as an alignment key, and etching the upper alternating stack by using the mask layer as a barrier to form a pattern in the first region.
Claims20
A vertical semiconductor device comprising:
- a substrate including a memory cell region and an alignment key region;
- a memory cell stack in which dielectric layers and gate electrodes are alternately stacked in the memory cell region;
- a dummy stack formed in the alignment key region;
- a lower channel structure that penetrates a lower portion of the memory cell stack;
- an upper channel structure that penetrates an upper portion of the memory cell stack and is located on the lower channel structure;
- a lower stepped alignment key having a trench shape and disposed in a lower portion of the dummy stack;
- and
- an upper stepped alignment key disposed in an upper portion of the dummy stack and caused by the lower stepped alignment key.
A semiconductor device comprising:
- a substrate including an alignment key region;
- a dummy stack formed in the alignment key region;
- a lower stepped alignment key having a trench shape and disposed in a lower portion of the dummy stack;
- and
- an upper stepped alignment key disposed in an upper portion of the dummy stack and caused by the lower stepped alignment key.
Dependencies are inferred from the claim text.