Patterning method and manufacturing method of semiconductor device
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsChristine Y Ouyang, Li-Te Lin
Life of this patent
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Abstract
A patterning method includes at least the following steps. A first material layer is provided. A second material layer is provided over the first material layer. The second material layer partially exposes the first material layer. A passivation layer is formed over the first material layer and the second material layer. A growth rate of the passivation layer on the second material layer is greater than a growth rate of the passivation layer on the first material layer. A first etching process is performed to remove a portion of the passivation layer and a portion of the first material layer.
Claims20
A patterning method, comprising:
- providing a first material layer;
- providing a second material layer over the first material layer, wherein the second material layer has an opening partially exposing the first material layer;
- selectively forming a passivation layer on the second material layer to cover a top surface of the second material layer and sidewalls of the opening, wherein a portion of the exposed first material layer is uncovered by the passivation layer;
- performing a first etching process to remove the portion of the exposed first material layer that is uncovered by the passivation layer;
- and
- performing a second etching process to remove the passivation layer.
A patterning method, comprising:
- providing a substrate;
- providing a first material layer on the substrate;
- providing a second material layer over the first material layer, wherein the second material layer has a first opening partially exposing the first material layer;
- depositing a blocking layer in the first opening;
- forming a passivation layer in the first opening, wherein the passivation layer covers a top surface of the second material layer, a top surface of the blocking layer, and sidewalls of the first opening;
- performing a first etching process to remove a portion of the blocking layer and a portion of the first material layer to form a second opening exposing the substrate;
- and
- performing a second etching process to remove the passivation layer.
A manufacturing method of a semiconductor device, comprising:
- providing a substrate;
- forming a metal-oxide-semiconductor (MOS) transistor over the substrate;
- forming an etch stop layer over the MOS transistor;
- depositing a dielectric layer over the etch stop layer;
- forming a first opening in the dielectric layer to expose the etch stop layer;
- selectively forming a passivation layer on the dielectric layer to cover a top surface of the dielectric layer and sidewalls of the first opening, wherein a portion of the exposed etch stop layer is uncovered by the passivation layer;
- performing a first etching process to remove the portion of the exposed etch stop layer that is uncovered by the passivation layer to form a second opening in the etch stop layer;
- performing a second etching process to remove the passivation layer;
- and
- filling a conductive material into the first opening and the second opening to form a conductive contact.
Dependencies are inferred from the claim text.