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US 11,908,506 B2Granted
Memory cell biasing techniques
AssigneeMicron Technology, Inc.
InventorsAngelo Visconti, Giorgio Servalli, Andrea Locatelli
Life of this patent
Estimating the term…
Abstract
Methods, systems, and devices for memory cell biasing techniques are described. A memory cell may be accessed during an access phase of an access operation. A pre-charge phase of the access phase may be initiated. The memory cell may be biased to a voltage (e.g., a non-zero voltage) after the pre-charge phase. In some examples, the memory cell may be biased to the voltage when a word line is unbiased and the memory cell is isolated from the digit line.
Claims18
A method, comprising:
- initiating a pre-charge phase of an access operation based at least in part on accessing a memory cell;
- biasing, during the pre-charge phase, an access line of the memory cell to a first voltage;
- and
- biasing, during the pre-charge phase, the access line of the memory cell to a second voltage based at least in part on biasing the access line of the memory cell to the first voltage, wherein the second voltage comprises a non-zero voltage and wherein the access line comprises a plate line.
1 more element
A method, comprising:
- initiating a pre-charge phase of an access operation;
- applying, during the pre-charge phase, a first voltage to a first access line coupled with a memory cell;
- applying, during the pre-charge phase, a second voltage to a second access line coupled with the memory cell, wherein the second voltage comprises a non-zero voltage;
- applying, during the pre-charge phase, a third voltage to the first access line based at least in part on applying the first voltage to the first access line;
- and
- applying, during the pre-charge phase, a fourth voltage to the second access line based at least in part on applying the second voltage to the second access line, wherein the first access line comprises a digit line and the second access line comprises a plate line.
3 more elements
A method, comprising:
- applying a first voltage to a first access line coupled with a memory cell during a pre-charge phase;
- applying a second voltage to a second access line coupled with the memory cell during the pre-charge phase;
- isolating the memory cell based at least in part on applying the first voltage to the first access line and applying the second voltage to the second access line;
- and
- maintaining the second voltage on the second access line at a non-zero voltage based at least in part on isolating the memory cell, wherein the second voltage is less than the first voltage.
2 more elements
Dependencies are inferred from the claim text.