Display panel and display device

A display panel, comprising:

• a pixel circuit and a light-emitting element,
• wherein the pixel circuit comprises a drive module and a data write module;
• wherein the drive module comprises a drive transistor;
• wherein an operation of the pixel circuit comprises at least one data write stage and at least one bias stage, during the data write stage, the data write module is on and provides a data signal, during the bias stage, the data write module is on and provides a bias signal;
• wherein an operation of the display panel comprises at least two data write frames, a data write frame of the at least two data write frames comprises a data write stage in which the data write module writes a data signal to a gate of the drive transistor;
• and
• wherein bias stages in the at least two data write frames have different durations;
• the operation of the display panel comprises a first data write frame and a second data frame, in the first data write frame, the bias stage has a duration of t7, and in the second data write frame, the bias stage has a duration of t8, wherein t7>t8≥0;
• wherein n second data write frames are comprised between two adjacent first data write frames, wherein n≥1.

A display device comprising a display panel, wherein the display panel comprises:

• a pixel circuit and a light-emitting element,
• wherein the pixel circuit comprises a drive module, a data write transistor and a bias transistor;
• wherein the drive module comprises a drive transistor;
• wherein the data write transistor is configured to transmit a data signal, and the bias transistor is configured to transmit a bias signal;
• wherein an operation of the pixel circuit comprises at least one bias stage, during the bias stage, the bias transistor is on and provides the bias signal;
• wherein an operation of the display panel comprises at least two data write frames, a data write frame of the at least two data write frames comprises a data write stage in which the data write transistor writes a data signal to a gate of the drive transistor;
• and
• wherein bias stages in the at least two data write frames have different durations;
• the operation of the display panel comprises a first data write frame and a second data frame, in the first data write frame, the bias stage has a duration of t7, and in the second data write frame, the bias stage has a duration of t8, wherein t7>t8≥0;
• wherein n second data write frames are comprised between two adjacent first data write frames, wherein n≥1.