Tracing synchronization activity of a processing unit
AssigneeGraphcore Limited
InventorDaniel John Pelham Wilkinson
Life of this patent
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AssigneeGraphcore Limited
InventorDaniel John Pelham Wilkinson
Estimating the term…
A device comprising: a processing unit comprising at least one processor configured to: participate in barrier synchronisations, each of which separates a compute phase of the at least one processor from an exchange phase for the at least one processor; and exchange sync messages with a sync controller hardware unit so as to co-ordinate each of the barrier synchronisations; and sync trace circuitry configured to: receive one or more of the sync messages; and in response to each of the one or more of the sync messages, provide sync trace information for output from the device, the sync trace information comprising timing information associated with the respective sync message.
A device comprising:
A method for tracing synchronisation activity for a processor of a processing unit, the method comprising:
A non-transitory computer readable medium storing computer readable instructions, which when executed by at least one processor, causes a method to be carried out, the method comprising:
Dependencies are inferred from the claim text.