System, apparatus and method for enabling fine-grain quality of service or rate control for work submissions

A device comprising:

• an input circuit to receive incoming work submissions from a processor, at least some of the incoming work submissions comprising quality of service (QoS) information including a quality class (QC) value and a quality priority (QP) value;
• a first queue coupled to the input circuit, the first queue associated with a first QC value;
• a second queue coupled to the input circuit, the second queue associated with a second QC value, wherein the input circuit is to store an incoming work submission into one of the first queue and the second queue based at least in part on the QC value of the incoming work submission;
• and
• a priority circuit coupled to the first queue and the second queue, wherein the priority circuit is to select a first incoming work submission stored in the first queue to provide to one of a plurality of destinations based at least in part on the QP value of the first incoming work submission, the first incoming work submission associated with a first process.

A system comprising:

• a processor comprising:
• an execution circuit, in response to a first instruction, to obtain command data from a first location identified in a source operand of the first instruction, access an entry of a process address space (PASID) table using a handle included in the command data and a pointer to obtain a PASID value and quality of service (QoS) information associated with an issuer of the first instruction, insert the PASID value and the QoS information into the command data and send a request comprising the command data to a device;
• the device coupled to the processor, wherein the device comprises:
• a front end circuit to receive and handle the request based at least in part on the QoS information, the front end circuit including a plurality of registers, wherein the front end circuit is to select the command data of the request to send to a first processing circuit of the device based at least in part on the QoS information;
• and
• a system memory coupled to the processor.