Operation elimination

A data processing apparatus comprising:

• rename circuitry configured to perform a register rename stage of a pipeline by storing, in storage circuitry, mappings between registers, wherein each of the mappings is associated with an elimination field value;
• operation elimination circuitry configured to replace an operation that indicates an action is to be performed on data from a source register and stored in a destination register, with a new mapping in the storage circuitry that references the destination register and has the elimination field value set;
• and
• operation circuitry configured to respond to a subsequent operation that accesses the destination register while the elimination field value is set, by obtaining contents of the source register, performing the action on the contents to obtain a result, and returning the result, wherein
• the operation is from the list comprising:
• bitwise NOT, negate-and-shift, reverse bits, reverse bytes, unsigned extension, and sign extension.

A data processing method comprising:

• performing a register rename stage of a pipeline by storing, in storage circuitry, mappings between registers, wherein each of the mappings is associated with an elimination field value;
• replacing an operation that indicates an action is to be performed on data from a source register and stored in a destination register, with a new mapping in the storage circuitry that references the destination register and has the elimination field value set;
• and
• responding to a subsequent operation that accesses the destination register while the elimination field value is set, by obtaining contents of the source register, performing the action on the contents to obtain a result, and returning the result, wherein
• the operation is from the list comprising:
• bitwise NOT, negate-and-shift, reverse bits, reverse bytes, unsigned extension, and sign extension.

A non-transitory computer-readable medium to store computer-readable code for fabrication of a data processing apparatus comprising:

• rename circuitry configured to perform a register rename stage of a pipeline by storing, in storage circuitry, mappings between registers, wherein each of the mappings is associated with an elimination field value;
• operation elimination circuitry configured to replace an operation that indicates an action is to be performed on data from a source register and stored in a destination register, with a new mapping in the storage circuitry that references the destination register and has the elimination field value set;
• and
• operation circuitry configured to respond to a subsequent operation that accesses the destination register while the elimination field value is set, by obtaining contents of the source register, performing the action on the contents to obtain a result, and returning the result, wherein
• the operation is from the list comprising:
• bitwise NOT, negate-and-shift, reverse bits, reverse bytes, unsigned extension, and sign extension.