Hardware acceleration with preconditioners

A computer program product, comprising:

• one or more computer readable storage media, and program instructions collectively stored on the one or more computer readable storage media, the program instructions comprising:
• program instructions to receive a preconditioning matrix from an application;
• program instructions to store the preconditioning matrix in an array of cells of a resistive processing unit;
• and
• program instructions to execute a process to apply the preconditioning matrix to a plurality of residual vectors, wherein the program instructions to execute the process comprise program instructions to perform analog matrix-vector multiplication operations on the preconditioning matrix and respective ones of the plurality of residual vectors to generate a plurality of output vectors used in one or more subsequent operations;
• wherein the program instructions to execute the process further comprise program instructions to perform a first iteration, which comprises:
• inputting a first residual vector of the plurality of residual vectors to the array of cells;
• utilizing the resistive processing unit to perform a first matrix-vector multiplication operation by multiplying the first residual vector with the preconditioning matrix in the array of cells to generate a first output vector of the plurality of output vectors;
• combining a given matrix with the first output vector to generate a first augmented matrix which is output from the array of cells;
• performing a second matrix-vector multiplication operation;
• and
• computing a second residual vector of the plurality of residual vectors based at least in part on the product of the second matrix-vector multiplication operation.

A method comprising:

• receiving a preconditioning matrix from an application;
• storing the preconditioning matrix in an array of cells of a resistive processing unit;
• and
• executing a process to apply the preconditioning matrix to a plurality of residual vectors, wherein the executing the process comprises performing analog matrix-vector multiplication operations on the preconditioning matrix and respective ones of the plurality of residual vectors to generate a plurality of output vectors used in one or more subsequent operations;
• wherein a first iteration of at least a portion of the process comprises:
• inputting a first residual vector of the plurality of residual vectors to the array of cells;
• utilizing the resistive processing unit to perform a first matrix-vector multiplication operation by multiplying the first residual vector with the preconditioning matrix in the array of cells to generate a first output vector of the plurality of output vectors;
• combining a given matrix with the first output vector to generate a first augmented matrix which is output from the array of cells;
• performing a second matrix-vector multiplication operation;
• and
• computing a second residual vector of the plurality of residual vectors based at least in part on the product of the second matrix-vector multiplication operation.