Modeling circuit of field effect transistor for symmetric modeling of electrostatic discharge characteristic, method of designing integrated circuit using the same and method of manufacturing integrated circuit using the same

A method of designing an integrated circuit, the method comprising:

• obtaining a circuit structure of the integrated circuit, the circuit structure including at least one field effect transistor;
• and
• analyzing the circuit structure and verifying the circuit structure, the analyzing and verifying using a modeling circuit of a field effect transistor,
• wherein the modeling circuit includes,
• a first field effect transistor on a semiconductor substrate,
• a first bipolar transistor having a first collector electrode connected to a first node corresponding to a first electrode of the first field effect transistor, a first emitter electrode connected to a second node corresponding to a second electrode of the first field effect transistor, and a first base electrode,
• a second bipolar transistor having a second collector electrode connected to the second node, a second emitter electrode connected to the first node, and a second base electrode connected to the first base electrode of the first bipolar transistor, and
• a substrate resistor connected between the first and second base electrodes and a first surface of the semiconductor substrate.

A modeling circuit of a field effect transistor comprising:

• a first n-type metal oxide semiconductor field effect transistor (NMOSFET) having a drain electrode, a source electrode, a gate electrode, and a bulk electrode;
• a first resistor connected between the drain electrode of the first NMOSFET and a first node;
• a second resistor connected between the source electrode of the first NMOSFET and a second node;
• a third resistor connected between the first node and a drain terminal for external connection;
• a fourth resistor connected between the second node and a source terminal for external connection;
• a first most exquisite transistor model-bipolar junction transistor (MEXTRAM-BJT) having a first collector electrode connected to the first node, a first emitter electrode connected to the second node, and a first base electrode;
• a second MEXTRAM-BJT having a second collector electrode connected to the second node, a second emitter electrode connected to the first node, and a second base electrode connected to the bulk electrode of the first NMOSFET and the first base electrode of the first MEXTRAM-BJT;
• a substrate resistor connected between the first and second base electrodes and a bulk external connection terminal;
• a first diode and a fifth resistor connected in series between the first node and the bulk external connection terminal;
• and
• a second diode and a sixth resistor connected in series between the second node and the bulk external connection terminal,
• wherein the first and second resistors correspond to MOSFET active resistances of the first NMOSFET, and
• the third and fourth resistors correspond to parasitic BJT active resistances of the first and second MEXTRAM-BJTs.