Computing system and method of verifying circuit design in computing system

A computing system configured to verify design of a receiver of a physical layer according to the Institute of Electrical and Electronics Engineers (IEEE) 802.11 standard, the computing system comprising:

• a memory configured to store computer executable instructions;
• and
• a processor configured to generate a first coverage model for at least two high-level parameters from hardware description language code by executing the computer executable instructions, generate a second coverage model for low-level internal signals from the hardware description language code by executing the computer executable instructions, generate a plurality of test packets for a regression test by using at least one of the first coverage model or the second coverage model by executing the computer executable instructions, and verify the design of the receiver of the physical layer according to the plurality of test packets by executing the computer executable instructions.