Unified host memory for coprocessors

A data processing system comprising:

• at least one central processing unit (CPU);
• at least one coprocessor;
• at least one application of a client running via system software on a hardware computing system that includes the at least one CPU and the at least one coprocessor;
• a virtualization layer installed to run on the hardware computing system and comprising computer-executable code which, when executed on the at least one CPU, is provided:
• for establishing a unified memory address space between the client and the hardware computing system for memory associated with the client and memory associated with the at least one coprocessor;
• and
• for synchronizing the memory associated with the client and the memory associated with the at least one coprocessor,
• wherein the virtualization layer runs logically between the at least one application and the system software in a non-privileged, user space, without modification of the at least one application or of the system software running on the hardware computing system, whereby the virtualization layer establishes the unified memory address space and synchronizes the memory transparently to the at least one application.

A data processing method comprising:

• executing instructions of at least one application of a client via system software on a hardware computing system that includes at least one CPU and at least one coprocessor, said at least one application including instructions to be executed on the at least one coprocessor;
• and
• using a virtualization layer that runs on the hardware computing system,
• creating a memory map with a destination address specification on the client and the hardware computing system,
• determining agreement between the client and the hardware computing system with respect to a common memory address range,
• detecting changes to a first memory that is associated with the client and is mapped to the common address range, and a second memory different from the first memory, that is associated with the at least one coprocessor and is mapped to the common address range, and
• synchronizing the first memory and the second memory.