Secure operating modes for computing devices

A computing device comprising:

• a main processor to run an operating system enabled to reference a main interrupt descriptor table, wherein the main interrupt descriptor table references instructions for execution when an external device is connected to the computing device;
• a communication interface to receive a lock signal;
• and
• a communication interface controller to, in response to the communication interface receiving the lock signal, cause the main processor to halt the operating system and to enter a secure operating mode, wherein the secure operating mode is enabled to reference an alternative interrupt descriptor table when the external device is connected to the computing device, wherein the alternative interrupt descriptor table references alternative instructions for execution when the external device is connected to the computing device and wherein the alternative instructions referenced by the alternative interrupt descriptor table includes instructions for the main processor to log indications of attempts of external devices to be connected to the computing device.

A non-transitory machine-readable storage medium comprising instructions to:

• detect receipt of a lock signal at a communication interface of a computing device;
• transmit an interrupt signal to a main processor of the computing device to cause the main processor to enter a secure operating mode, wherein upon receipt of an indication that a new external device was connected to the computing device in the secure operating mode, the main processor is to reference secure memory to obtain instructions for execution in response to connection of the new external device, wherein the interrupt signal is transmitted via an interrupt pin of the main processor, and wherein the instructions for execution in the secure memory include instructions for the main processor to log indications of attempts by external devices to connect to the computing device;
• detect receipt of an unlock signal at the communication interface;
• and
• transmit a release signal to the main processor to cause the main processor to exit the secure operating mode.