US 11,907,065 B2 · Resiliency and performance for cluster memory

Abstract

Disclosed are various embodiments for improving the resiliency and performance of clustered memory. A computing device can generate at least one parity page from at least a first local page and a second local page. The computing device can then submit a first write request for the first local page to a first one of a plurality of memory hosts. The computing device can also submit a second write request for the second local page to a second one of the plurality of memory hosts. Additionally, the computing device can submit a third write request for the parity page to a third one of the plurality of memory hosts.

Claims20

Dependent claims

A system, comprising:

a computing device comprising a processor and a memory;
and
machine-readable instructions stored in the memory that, when executed by the processor, cause the computing device to at least:
generate at least one parity subpage for a respective one of a plurality of subpages of a local page in response to a change to the local page;
submit a write request for each of the plurality of subpages to a respective one of a plurality of memory hosts;
and
submit an additional write request for the at least one parity subpage to an additional one of the plurality of memory hosts.

4 more elements

A non-transitory, computer-readable medium comprising machine-readable instructions that, when executed by a processor of a computing device, cause the computing device to at least:

generate at least one parity subpage for a respective one of a plurality of subpages of a local page in response to a change to the local page;
submit a write request for each of the plurality of subpages to a respective one of a plurality of memory hosts;
and
submit an additional write request for the at least one parity subpage to an additional one of the plurality of memory hosts.

1 more element

Dependencies are inferred from the claim text.

Facts

Application

18/101,536Filed 25 Jan 2023 · continuation

Priority

IN 20214103202216 Jul 2021

Published

US 2023/0012999 A11 Jun 2023

Granted

20 Feb 2024

Term ends

Not estimatedThe source records don’t support an estimate.

Classification10 codes

G06F 11/1068
In individual solid state devices: in sector programmable memories, e.g. flash disk
G06F 3/0619
Improving the reliability of storage systems: in relation to data integrity, e.g. data losses, bit errors
G06F 3/064
Organizing or formatting or addressing of data: management of blocks
G06F 3/0659
Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices: command handling…

Resiliency and performance for cluster memory

Life of this patent

Resiliency and performance for cluster memory

Life of this patent

Abstract

Claims20