Memory controller and memory system including the same

A memory device, comprising:

• a memory cell array which includes a plurality of memory cells for storing data;
• and
• a memory controller which controls an access to the memory cell array,
• wherein the memory controller includes
• a fault predictor which includes a memory error profiler that receives raw data related to an error occurring in the data and processes the raw data into an error profile that is data available for machine learning, and a memory fault prediction network that receives the error profile as an input and performs the machine learning using the error profile to predict a fault that causes the error, and
• an ECC manager which classifies a type of the fault based on the predicted fault.

A memory system, comprising:

• a memory device which includes a memory cell array including a plurality of memory cells for storing data;
• and
• a memory controller which includes a fault predictor that predicts a fault that causes an error occurring in the memory device, an ECC manager that classifies a type of the fault based on the predicted fault, and a plurality of ECC engines that perform ECC in parallel depending on the classified type of the fault,
• wherein the fault predictor includes
• a memory error profiler that receives raw data related to an error occurring in the data and processes the raw data into an error profile that is data available for machine learning, and
• a memory fault prediction network that receives the error profile as an input and performs the machine learning using the error profile to predict a fault that causes the error.